///////////////////////////////////////////////////////////////////////////////
// Company: University of Cincinnati
// Author: Jordan Ross, Ben Gentry, Bryan Butsch
//
// Created Date: 10/08/2013
// Design Name:
// Module Name: DIN_mux
// Project Name: top_level
// Target Devices: Cyclone II EP2C20F484C7
// Tool Versions: Quartus 13.0
// Description: This module is a multiplexer for the data into the processor
//              from the memory module and the port_n module
// 
// Dependencies: memory.v, port_n.v
// 
// Revision:
// 0.01 - File Created
//
// Additional Comments:
//
///////////////////////////////////////////////////////////////////////////////
module DIN_mux(DIN_MEM, DIN_PN, A8, DIN);
    input [8:0]DIN_MEM;
    input [8:0]DIN_PN;
    input A8;
    output reg [8:0] DIN;

	always @(*) begin
		/* DIN logic mux */
        if (A8)
            DIN = DIN_PN;
        else
            DIN = DIN_MEM;
	end
endmodule
   